Typically, for radiation-emitting optical components, in particular for light-emitting diode components, at the present time use is made, in practice, essentially exclusively of parallelepipedal radiation-emitting semiconductor chips which are generally embedded in transparent potting material. In this case, a major difficulty is posed by the great difference between the refractive indices of customary semiconductor materials of optical semiconductor elements (n>2.5) and the conventionally available potting materials (for example epoxy resin; nEpoxy≅1.5). The critical angle of total reflection at the interface between semiconductor body and potting material is consequently very small. This is the reason why, on account of total reflection at the chip surfaces, a considerable part of the light generated in the active zone is not coupled out from the semiconductor body and is lost in the interior thereof. Given a predetermined electric current which flows through the semiconductor component for the purpose of generating the light, the brightness of the component is thus limited.
In the case of GaN-based light-emitting diode chips in which the epitaxial layer sequence is arranged on a substrate (for example a silicon carbide substrate) which has a higher refractive index than the epitaxial layer sequence, the particular problem arises, moreover, that, given a conventional parallelepipedal chip geometry, the proportion of radiation which is coupled out through the substrate flanks is coupled out at a very acute angle with respect to the substrate flank in the direction of the rear side of the chip. Consequently, this radiation impinges on a housing mounting area, on which the chip is fixed, at a very steep angle and very near to the chip. This entails the disadvantages that, firstly, on account of the acute angle of incidence, a large part of the radiation is absorbed in the chip mounting area and, secondly, there is a considerable risk of a certain part of the radiation impinging on the conductive adhesive usually used for fixing the chip and being absorbed by said conductive adhesive.
U.S. Pat. No. 6,229,160 proposes a radiation-emitting semiconductor body in which, in order to increase the luminous efficiency, a so-called primary window layer is arranged downstream of the active zone in the envisaged radiating direction of the semiconductor body, the continuous side surface of which forms an obtuse angle with the main plane, which is parallel to the layers of the multilayered heterostructure. The continuous side surface forms an obtuse angle of between 110° and 140° with the plane of the active zone. In this case, the primary window layer is formed by the growth substrate or by an epitaxial layer grown separately on said growth substrate.
In addition, in accordance with U.S. Pat. No. 6,229,160 the semiconductor body may have a further, so-called secondary, window layer which is applied at that side of the active zone which is remote from the primary window layer, that is to say at the underside of the semiconductor body by means of epitaxy or wafer bonding and whose continuous side surface forms an angle of between 40° and 70° with the plane of the active zone. The semiconductor body consequently has chip flanks which are oblique continuously from the top side to the underside.
This chip geometry primarily serves to make the chip surface which runs parallel to the active zone larger than the active zone and to have the effect that light which impinges on the oblique side walls of the primary window is reflected completely internally toward the envisaged radiating direction.
The secondary window layer additionally fulfils the task of coupling out light which is emitted from the active zone rearward, that is to say in the direction of the mounting area of the semiconductor body, from the semiconductor body via the oblique side areas of the secondary window layer.
In order to reduce a coupling-out of light in the backward direction and to deflect said light toward the front side preferably already in the semiconductor body, a reflective coating of the entire oblique chip flanks is proposed.
This known chip geometry, which is primarily directed at improving the coupling-out of light via the front side, raises the following problems, in particular:    (i) During the production of the oblique side areas, a considerable proportion of the area of the active epitaxial layer sequence present on the wafer is lost because these are produced by means of the production of a V-shaped trench from the side of the active zone.    (ii) The thickness of the secondary window layer is greatly limited in order that a sufficiently large chip mounting area is preserved, in the case of which            the chip is not tilted in the course of its mounting in a light-emitting diode housing,        a current expansion to as far as possible the entire active zone is ensured,        a sufficient dissipation of heat from the active zone is assured, and        the chip has sufficient chemical stability. It therefore amounts to preferably only approximately 10 to 40% of the lateral width of the active zone.            (iii) The oblique side flanks form, together with the chip mounting area of a light-emitting diode housing, a wedge-shaped gap which, in the case of conventional plastic LED housings, is generally filled with transparent potting material. In the event of an increase in the component temperature during operation and/or on account of an increase in the ambient temperature, as occurs for example in applications in motor vehicles, considerable mechanical forces act on the chip on account of the high thermal expansion of customary potting compositions, that are considerably increasing the risk of a delamination of the chip from the chip mounting area of the housing in comparison with parallelepipedal chips.    (iv) The production of the secondary window layer is associated with a considerable technical effort because this has to be additionally grown separately or has to be additionally applied by means of wafer bonding.    (v) The lower area of the chip, which represents the mounting area, is the smallest area of the semiconductor body, above which the greatly projecting upper window region is arranged. Therefore, there is the great risk that, in the case of an automatic chip mounting technique that is conventionally used in chip mounting, generally a pick and place method, a tilting of the chip and thus a tilting of the radiating axis of the corresponding light-emitting diode component may occur. This risk is reduced if only a primary window layer and no secondary window layer is present.    (vi) The thickness of the lower window layer that is possibly present must be kept as small as possible for the reasons mentioned above under (ii) and (v). This means, however, that a substantial part of this window is covered by an adhesive that is usually used for the mounting of light-emitting diode chips and so said window cannot contribute completely or cannot contribute at all to the coupling-out of light.
Items (ii) and (v) increase in importance as the edge length of the chip decreases, that is to say as the cross section of the active zone becomes smaller, which is permanently striven for with regard to the largest possible chip yield from a single wafer, because the smaller the edge length, the smaller becomes the resulting mounting area of the chip given the chip geometry proposed. For these reasons, the lower window layer is made as thin as possible or omitted.
The chip geometry disclosed in U.S. Pat. No. 6,229,160, if it is suitable at all, is suitable in practically expedient fashion only for material systems based on GaP, in which it is possible to epitaxially produce thick layers of both conduction types which are sufficiently electrically conductive to realize, in particular, the proposed lower window layer and at the same time to be able to achieve a current expansion to approximately the entire active zone.
In the nitride-based semiconductor material system, comprising in particular GaN, InN and AlN and all ternary and quaternary mixed crystals based on GaN, InN and AlN, such as, for example, AlGaN, InGaN, AlInN and AlGaInN, p-conductively doped layers, in particular, have a sufficiently low electrical resistance only when they are comparatively thin. Therefore, a thick lower window in accordance with the arrangement described above can be realized, in particular in the case of conventionally used active layer sequences based on GaN, in which the lower window layer would have to be arranged on the p-conducting side, with the difficulties explained above being accepted, only by means of wafer bonding, which is associated with high technical effort.
U.S. Pat. No. 5,233,204 discloses a geometry of a light-emitting semiconductor body based on InGaAlP, in which a thick transparent epitaxial layer comprising GaP, GaAsP or AlGaAs is arranged between an absorbent substrate and an active layer structure. The side areas of the thick transparent epitaxial layer are oblique with respect to the active layer structure, in such a way that a funnel-shaped layer is produced. As a result, more of the radiation emitted by the active layer structure toward the substrate impinges on the side area of the transparent layer at an angle which is less than the angle of total reflection.
However, considerable light losses occur in the case of the chip geometry proposed in U.S. Pat. No. 5,233,204. On the one hand on account of total reflection at the interface between the active layer structure and the thick transparent epitaxial layer (refractive indexactive layer>refractive indexwindow) and subsequent absorption in the active layer sequence. On the other hand on account of absorption in the radiation-absorbing growth substrate. Furthermore, the production of the window layer produced as a thick transparent epitaxial layer requires a considerable additional technical effort.
In order to improve the coupling-out of light, it has been proposed elsewhere to produce semiconductor components having a for example triangular or parallelogram-like lateral cross section; in this respect, see the publication Song Jae Lee, Seog Won Song: “Efficiency Improvement in Light-Emitting Diodes Based on Geometrically Deformed Chips”, SPIE Conference on Light-Emitting Diodes, San Jose, Calif., January 1999, pages 237 to 248. In these arrangements, the reflections in the chip are increased because the angles of reflection change often. At the same time, therefore, it is necessary, however, to form the radiation-generating layer, the contacts or other layers of the semiconductor component such that they absorb as little light as possible.